KITSW Main page
Dept. of Electronics & Instrumentation Engg.
KITS Warangal
Faculty group mail-id : eie@kitsw.ac.in
 
Faculty Profile
Address/Contact
Office : Room No. - 215;  Block-1.
Phone: 0870-2564888(ext:257)
Mobile: 9440591120
E-mail : oa.eie@kitsw.ac.in
 
Education
B.Tech., Electronics & Instrumentation Engg., Kakatiya University, Warangal (1998).
M.Tech., Instrumentation & Control Systems Engg, JNTUCE, Kakinada, (2002).
Ph.D.(Pursuing), VLSI, JNTU, Hyderabad.
ONTERU ANJANEYULU
ASSOCIATE PROFESSOR
DEPT. OF ELECTRONICS & INSTRUMENTATION ENGG.
Academic Research IDs
Vidwan ID: 179441
SCOPUS ID: 57188957058
Researcher ID: HIK-2356-2022
Google Scholar ID: --
ORCID ID: --
 
ACADEMIC AFFILIATION

Details

FromTo

Name of the Organization

Associate Professor

June, 2008

Till Date

 

Kakatiya Institute of Technology & Science, Warangal.

Assistant Professor

June, 2003

May, 2008

 

Kakatiya Institute of Technology & Science, Warangal.

Assistant Professor

June, 2002

May, 2003

 

SKTRMCE, Mahaboobnagar
RESEARCH INTERESTS
  • VLSI
  • Instrumentation
PUBLICATIONS
Publications  in Refereed Journals

S. No
Details                                                                                                                                               

1
O.Anjaneyulu, T.Pradeep & C.V. Krishna Reddy, “ Design of an Efficient Reversible Logic Based Bidirectional Barrel shifter” in International Journal of Electronics Signals and systems (IJESS) ISSN: 2231-5969, Volume 2, Issue 2,3,4, 2012, pp. 48-53.

2
Onteru. Anjaneyulu, L.Swapna, C. V. Krishna Reddy ” An Improved optimization Techniques for Parallel prefix adder using FPGA”, in INTERNATIONAL JOURNAL OF MODERN ENGINEERING (IJMER), ISSN No 2249 – 6645,Vol- 3  Issue - 5  pp. 3107-3115, October 2013

3
Onteru. Anjaneyulu, Kallepelli Sagar, C. V. Krishna Reddy ” An Alternative Logic Approach to Implement Energy Efficient 90-Nm Cmos Full Adders”, INTERNATIONAL JOURNAL OF SCIENTIFIC RESEARCH(IJSR), ISSN No 2277 – 8179,Volume 2  Issue - 10  pp. 1-4, October 2013

4
O.Anjaneyulu, A.Veena, C. V. Krishna Reddy “Self Controllable Pass Transistor low power pulsed flipflop”, IJETAE ISSN No 2250-2459,Vol- 4  Issue - 5 pp.No. 425-429, May 2014  

5
O.Anjaneyulu, C.V. Krishna Reddy, ‘’A Novel Approach for Design and Implementation of Sequential Multipliers’’ , International Journal of Core Engineering & Management (IJCEM), ISSN:2348-9510, Volume 1,  December, 2015, pp. 1-8.
6
O. Anjaneyulu, C.V. Krishna Reddy, ‘’A Novel Design of Full Adder Cell for VLSI Applications ’, International Journal of Electronics (IJE), Volume 110, Issue:04, March, 2023, p.p. No.670-685 (SCI) (Taylor & Francis).
Publications in Refereed Conference Proceedings

S.No.
Details

1
S.V.Krishna Rao,P.Rajasekhar babu, O.Anjaneyulu, “Novel Area-Efficient & high speed Architectures for FIR Filtering with Symmetric Signal Extension, 1st International Conference on Emerging Trends in Signal Processing & VLSI Design, 11-13 June, 2010, Gurunanak Engineering college, Ibrahimpatnam, Ranga Reddy District.

2
O.Anjaneyulu, P.Praveen, “Smart Sensors” Proceeding of 4th National Conference in Mechanical Engineering (TIME’10),30.12.2010  KITS, Warangal.

3
O.Anjaneyulu, Dr.C.V.Krishna Reddy, Srinivas Reddy Bendram, P.Rajasekharbabu, “Low Power Design of Asynchronous protocol  Converters for Two-phase Communications”. A Two day National Conference on Recent Trends and Advances in Nano Technology, 28th & 29th July, 2011, Guru Nanak Engineering College, Ibrahimpatnam, Ranga Reddy District.

4
O.Anjaneyulu, T.Pradeep, C.V. Krishna Reddy, “ Design and Implementation of Reversible Logic Based Bidirectional Barrel Shifter”. 978-1-4673-2396-3/12 @ 2012 IEEE, IEEE-ICSE2012 Proc., 2012, Kuala Lumpur, Malaysia. pp. 490-494.

5
O.Anjaneyulu, T.Pradeep & C.V. Krishna Reddy, “ Design of An Efficient Reversible Logic Based Bidirectional Barrel shifter”, International Conference in Electronics and Communication Engineering, 20th May 2012, Bangalore, ISBN: 978-93-81693-29-2, pp.No. 108-114.

6
O.Anjaneyulu, Parsha srikanth, C.V. Krishna Reddy & A.S.Ram Kumar, “ A Novel Architecture of LUT Design optimization for DSP Applications.” International conference on Electrical Electronics & Computer Science, ISBN: 987-9381361-17-7, 28th August, 2012, GOA, pp. No. 17-22.

7
O.Anjaneyulu, Veena, A. ; Shravan, C.H. ;  Reddy C.V.K.“ Self Driven Pass-Transistor based Low-Power Pulse Triggered Flip-Flop Design”, in Proc. IEEE Signal Processing And Communication Engineering systems Conf., SPACES 2015, Guntur, Andhra Pradesh.,2-3 Jan,2015, p.p. 22-28. ( DOI 10.1109/SPACES.2015.7058266)
   
National Conferences

1
O.Anjaneyulu, Dr.C.V.Krishna Reddy, Srinivas Reddy Bendram, P.Rajasekharbabu, “Low Power Design of Asynchronous protocol Converters for Two-phase Communications”. A Two day National Conference on Recent Trends and Advances in Nano Technology, 28th & 29th July, 2011, Guru Nanak Engineering College, Ibrahimpatnam, Ranga Reddy District.

2
O.Anjaneyulu, P.Praveen, “Smart Sensors” in Proceeding of 4th National Conference in Mechanical Engineering (TIME’10), 30.12.2010  KITS, Warangal,
PROFESSIONAL AFFILIATION

S.No
Details

1
Member – Institute of Electrical and Electronics Engineers (IEEE)

2
Member – Indian Society for Technical Education (ISTE- LM 41769)

2
Member – Institution of Electronics and Telecommunication Engineers (IETE-M181415)
COURSES TAUGHT
Undergraduate Level

Courses Taught

Currently Teaching
Course

Semester, Year, Branch
Course

Semester, Year, Branch
Digital Electronics

I Sem, III/IV, IT
PC Based Instrumentation

II Sem, IV/IV, EIE
Linear Integrated Circuits

I Sem, III/IV, E&I
Digital Electronics
I Sem, III/IV, CSE
Electrical and Electronic Measurements

I Sem, II/IV, E&I

 

 
Instrument Transducers

I Sem, III/!V, E&I

 

 
Signals & Systems

II Sem, II/IV, EEE

 

 
Microprocessors & Microcontrollers

I Sem, III/IV, E&I

 

 
Basic Electronics

 

 

 
Microprocessors & Systems Interfacing

II Sem, III/IV, IT

 

 
Process Instrumentation

I Sem, III/IV, E&I

 

 
PC Based Instrumentation

II Sem, IV/IV EIE

 

 
Electronic Devices & Circuits-I

I Sem, II/IV EIE

 

 
Electronic Devices & Circuits-II

II Sem, II/IV EIE

 

 
Electronic Measurements & Instrumentation

II Sem,II/IV ECE

 

 

Postgraduate Level
VLSI Technology

I Sem, M.Tech. VLSI & ES

VLSI Technology

I Sem, M.Tech. VLSI & ES
VLSI Physical Design

II Sem, M.Tech. VLSI & ES

 

 
Digital Design

I Sem, M.Tech. VLSI & ES

 

 
Mixed Signal Design
II Sem, M.Tech-VLSI&ES
    
Hardware Description Language
I Sem, M.Tech-VLSI & ES
    
       
FACULTY DEVELOPMENT PROGRAMMES/SEMINARS/WORKSHOPS/STTPs ATTENDED

S.No.
Details

1
Two Day workshop on VHDL from August 17-18, 2003 at KITS, Warangal.

2
Attended a two day workshop on DSP Tools organized by Dept.of ECE, Kakatiya Institute of Technology & Science, Warangal and IETE Warangal Sub-center on 28th , 29th , Dec 2006

3
AICTE-ISTE sponsored STTP on “Microcontroller and its applications” by Dept. of E & I , Kakatiya Institute of Technology & Science, Warangal during 7-19 June, 2004(two week programme).

4
TEQIP(Embedded systems Design) at Osmania University College of Engineering, Hyderabad during 27-29, Sep, 2007.

5
TEQIP(Advances in DSP) at NIT, Warangal during 21-25 March, 2007.

6
Tutorial on “Large MIMO Wireless: Opportunities, Challenges, Solutions” on 26th Nov, 2011 at R&T unit for Navigational Electronics, Osmania University, Hyderabad.

7
A Three day workshop on “Digital Signal Processing & Programming" from 27th – 29th Jan,2012 at JNTU, Hyderabad.

8
Two-week ISTE workshop on " Analog Electronics", Conducted by IIT, Kharagpur, 4th – 14th June, 2013 at NIT, Warangal

9
Two Week FDP on Digital VLSI Circuit Design   from 03.06.2017 to 12.06.2017 at NIT, Warangal.

10
One week FDP on  Effective Teaching and Learning of Digital Electronics  from 21.03.2017 to  25.03.2017 at NIT, Warangal.

11
Two Day workshop on Effective Functioning of an Autonomous Institute from 17.01.2015 to 18.01.2015 at Kakatiya Institute of Technology & Science, Warangal.

12
One week FDP on Hands on LabVIEW and Its Applications in Engineering from 04.05.2017 to 09.05.2017 at Kakatiya Institute of Technology & Science, Warangal.

13
One week FDP on Quality Assurance in Higher Educational Institutions and Industries from 19.07.2017 to 23.07.2017 at Kakatiya Institute of Technology & Science, Warangal.
14
One week AICTE Sponsored STTP on “ VLSI Design: Bridging Concepts to practice” Dept of EIE, 25-30 Nov 2020
15
A five day workshop on “High Performance VLSI Architectures for DSP”, @ IIITDM, Kancheepuram, Chennai, 10-14 June 2019
16
Six day FDP on “Nanoscale Devices & Circuits”, E & ICT, NITW, 17-22 June 2019
17
One Week FDP on “VLSI Design: Bridging Concepts to Practice”, KITSW, 25-30 March, 201
18
  • Six Day FDP on “DNA of Mixed Signal IC Design for Portable Systems”, Organized by E & ICT, 20 – 25 May 2019
19
Six Day FDP on “Nanoscale Devices and Circuits”, E & ICT, 17 – 22 June 2019
20
FDP on “Quality Assurance in Higher Educational Institutions and industries “at  KITSW, 19 -23 July 2017
21
Two-week FDP on “Digital VLSI Circuit Design”, E & ICT, IIT Roorkee at NITW, 3 – 12 June 2017
22
Six Day FDP on “New Pedagogic Techniques in Technical Education”, TLC-NITW & ETC-KITSW, 26 Feb - 03 , March 2018
   
ABROAD VISITS

S.No

 Place of visit Purpose of visit Name of Event

Duration

1

Kaulalumpur, Malaysia

Paper Presentation

IEEE  International Conference on Semiconductor Electronics (ICSE 2012)

 19-21 Sept, 2012

 

      

 

 

      

 
OTHER ACTIVITIES

S.No.
Details

1
Acting as Executive Member for IETE Center, Warangal.

2
Acting as General Secretary, KITSWAA National Executive Council of Kakatiya Institute of Technology & Science, Warangal.

3
Acting as Board of Studies Member for Electronics & Instrumentation Engg. Stream in Kakatiya Institute of Technology & Science, Warangal.

4
Acting as Faculty In-charge, Alumni Affairs in Kakatiya Institute of Technology & Science, Warangal.

5
Acting as Faculty In-charge for Microprocessors & Microcontrollers Laboratory of Dept. of E&I Engg., Kakatiya Institute of Technology & Science, Warangal.

6
Acting as Library Advisory Committee Member in Kakatiya Institute of Technology & Science, Warangal.
   

 

 

 
Best viewed in browser Internet Explorer 9 or above with screen_Resolution 1280X1024